Get2Chip Intros RTL Synthesis for 100M Gate Era
RTL Compiler-TM- Best For Multi-Million Gate, High-Frequency Designs
SAN JOSE, Calif.--(BUSINESS WIRE)--April 15, 2002--Get2Chip Inc.,
the electronic design automation (EDA) supplier of multi-level,
system-on-chip (SOC) synthesis, today introduced its RTL Compiler
(a.k.a. G2C-RC(TM)), a high-speed, high-capacity alternative for
register transfer level (RTL) synthesis of multi-million gate
integrated circuits (ICs).
Optimized for designs larger than 1 million gates with aggressive
clock speeds, G2C-RC(TM) provides a synthesis alternative for the SOC
era, according to Get2Chip President and Chief Executive Officer (CEO)
Bernd Braune.
"G2C-RC is aimed at an under-served market needing consistent
quality of results, super-fast runtimes, and confidence that new
design tools will readily fit into existing flows and methodologies,"
adds Braune. "G2C-RC has seen more than 200 designs and has been built
to be flow compatible with the old technology designers have used for
some time. With 100 nanometer silicon just around the corner, chip
designers have been looking for this productivity boost at the
front-end."
Michael Raam, Procket Networks' vice president of VLSI, has
converted the company's production flows to Get2Chip's G2C-RC to
design massive networking chips. "With Get2Chip's RTL Compiler in our
COT flow we achieved faster runtime, an improvement in clock speed,
correlation of timing with the backend, some reduction in area, and
compatibility with our existing EDA tools. Get2Chip is helping us to
create superior products and bring them to market in record time in a
highly competitive environment."
To produce superior designs with less effort, Get2Chip's G2C-RC
brings value-added features such as test insertion and power
optimization to this class of products for the first time. New
analytic technologies built into the software include a global-based
optimization engine enabling linear behavior over design and library
size; constraint-directed logic, power and datapath optimization; and
the industry's most efficient data representation.
The total negative slack (TNS) optimization of G2C-RC increases
timing margins to optimize more than a design's critical path,
providing extra timing margin for near timing critical signals.
To ensure ease of use, G2C-RC enjoys verified compatibility with a
number of widely used EDA products, including simulators;
verification, test, and analysis tools; and place and route software,
including a specialized interface module to Avanti's Apollo.
Additional technical information on G2C-RC, benchmark results
versus competitive synthesis offerings, and a list of compatible
software, can be found at: http://www.get2chip.com.
G2C-RC is now shipping. Base price is $100,000. For more
information, contact Get2Chip at (408) 501-9600, or visit
www.get2chip.com.
Additional Quotes
Garo Toomajanian, vice president and research analyst at RBC
Capital Markets offered his assessment of the Get2Chip market
position. "The difference between Get2Chip and other synthesis
alternatives is that Get2Chip is the only full-chip, system-level
solution. With design closure issues in the back-end of the design
flow now largely addressed, we believe the focus will shift upstream
in the design flow to system-level issues. The opportunities to
optimize designs are far greater and easier to implement at higher
levels of abstraction, early in the design flow, than in back-end
processes. Because of that, Get2Chip is well positioned to give
designers better results, with less effort and in less time."
"We have spent the last 12 months polishing the compatibility of
G2C-RC," adds Dr.Hormoz Yaghutiel, Get2Chip's vice president of
engineering. "When dealing with a 20 million-gate design, engineers
cannot afford compatibility or interoperability issues. G2C-RC will
upgrade existing design flows without interrupting the production
process."
About Get2Chip
Get2Chip, Inc., is a leading supplier of software products that
enable the design of the world's most complex integrated circuits
(ICs), primarily found in the communications, wireless, computer, and
consumer product markets. It was launched in 2000 by semiconductor
veterans and chip design tool experts from Cadence Design Systems,
Inc. (NYSE: CDN - news), LSI Logic Corporation (NYSE: LSI - news), Mentor Graphics
Corporation (Nasdaq: MENT - news), Synopsys (Nasdaq: SNPS - news) and VLSI
Technology -- now part of Philips Semiconductors (NYSE: PHG, AEX:
PHI). Its breakthrough front-end tool suite provides fully integrated,
multi-level synthesis that offers the flexibility to do chip design at
the architectural, register transfer (RTL) or gate level. Get2Chip's
products run on Sun and Hewlett Packard, and PC under Linux. Get2Chip
is privately held and has development centers in San Jose, Calif., and
Munich, Germany. Corporate headquarters: 2107 North First Street,
Suite 350, San Jose, Calif. 95131. Telephone: (408) 501-9600.
Facsimile: (408) 501-9610. Email: info@get2chip.com. Web Site:
http://www.get2chip.com.
Get2Chip, and RTL Compiler are trademarks of Get2Chip. Get2Chip
acknowledges trademarks or registered trademarks of other
organizations for their respective products and services.
Contact:
Nanette Collins
Public Relations for Get2Chip
(617) 437-1822
nanette@nvc.com
